Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including volatile and non-volatile memory. Volatile memory can require power to maintain its data (e.g., information) and includes random-access memory (RAM), dynamic random access memory (DRAM), and synchronous dynamic random access memory (SDRAM), among others. Non-volatile memory can provide persistent data by retaining stored data when not powered and can include NAND flash memory, NOR flash memory, static random access memory (SRAM), resistance variable memory, such as phase change random access memory (PCRAM) and resistive random access memory (RRAM), and magnetic random access memory (MRAM), such as spin torque transfer random access memory (STT RAM), among others.
Memory devices can be combined together to form a solid state drive (SSD). A solid state drive can include non-volatile memory such as NAND flash memory and/or NOR flash memory, and/or can include volatile memory such as DRAM, among various other types of non-volatile and volatile memory. Flash memory devices, including floating gate flash devices and charge trap flash (CTF) devices can comprise memory cells having a storage structure (e.g., a floating gate or a charge trapping structure) used to store charge and may be utilized as non-volatile memory for a wide range of electronic applications.
Various apparatuses (e.g., computing systems) can comprise an SSD coupled to a host (e.g., a personal laptop computer, a desktop computer, a digital camera, a mobile telephone, or a memory card reader, among various other types of hosts). Memory management processes associated with SSD operation can suffer inefficiencies due to sub-page writes, misaligned writes, and/or unpredictable temporal and spatial locality, for example. Such inefficiencies can be due to factors such as input/output (I/O) workload pattern irregularity associated with commands (e.g., write, read, erase, etc.) received from the host, which can increase write amplification and/or reduce garbage collection efficiency, among other drawbacks. Memory management processes often employ logical to physical (L2P) mapping data structures (e.g., tables) to map between logical address space and physical address space (e.g., to determine locations of physical data stored on a memory). However, many current L2P mapping approaches are not able to effectively account for host I/O workload pattern irregularity.